The present invention relates to an electrically erasable nonvolatile memory, or an EEPROM, having memory cells including selecting gate MOS transistors, control gate MOS transistors, word lines, control lines, and bit lines.
Referring to FIG. 2, a conventional EEPROM has memory cells 1 in which selected word line 101 and control line 111 are set high (20 V) during erasure. At the same time, a control gate 131 selected by these lines is set high. During writing, selected word line 101 and bit line 121 are set high. At the same time, the drain 132 of a control gate MOS transistor 12 selected by them is set high. When the erasure or the writing ends, the supply of the high voltage is stopped when the erasure ends, the source of the high voltage is kept at ground level (0 V) for a given time (several microseconds) while maintaining the control line 111 and the control gate 131 in selected state. When the writing ends, the source of the high voltage is kept at ground level for a given time while maintaining the bit line 121 and the drain 132 of the control gate MOS transistor 12 in selected state. In this way, when the erasure ends, the selected control line 111 and control gate 131 are electrically discharged. When the writing ends, the selected bit line 121 and the drain 132 of the control gate MOS transistor 12 are electrically discharged.
In the conventional EEPROM, if the power is turned off during erasure or writing, the word lines selected immediately before the power is turned off drop to ground level. The control lines or bit lines selected immediately before the power is turned off are released, i.e., have high impedance. Therefore, electric charge remains either on the control lines and the control gates or on the bit lines and the drains of the control gate MOS transistors due to the high voltage. As a result, erroneous erasure, erroneous writing, and erroneous reading can take place.
Accordingly, the present invention is intended to solve this problem with the prior art techniques. It is an object of the present invention to provide an EEPROM which electrically discharges electric charge when the power is turned on, the charge being left due to high voltage remaining after the power is turned off during erasure or writing, whereby preventing erroneous erasure, erroneous writing, and erroneous reading.